Skip to main content

Circuit-Level Secure-by-Design Digital Integrated Circuits

Researcher: Ken Mai

Research Area: Trustworthy Computing Platforms and Devices


Scope:  Secure digital integrated circuits against side-channel and probing attacks by developing techniques for: efficient side-channel-secure logic circuits, remanence-free secure semiconductor memories, self-monitoring circuit for power consumption delay, and logical correctness to detect probing, fault injection, side-channel leakage, and maliciously inserted circuits, self-reconfiguring architectures to reduce side-channel leakage and hinder fault injection and probing.

Outcomes: AES encryption processor prototype testchip using efficient side-channel secure logic (tapeout July, 2009), techniques for remanence-free, power-analysis-resistant SRAM design and a prototype testchip (tapeout Spring 2009), techniques for self-monitoring/reconfiguration to counter side-channel attacks, a secure-level secure-by-design FPGA prototype testchip.