research area

Available and Secure Computing Systems

dividing line

Current Projects:

Circuit-Level Secure-by-Design Field Programmable Gate Arrays (FPGAs)

Recent Publications

B. Calhoun, X. Li, K. Mai, L. Pileggi, R. Rutenbar, K. Shepard, “Digital Circuit Design Challenges and Opportunities in the Era of Nanoscale CMOS” To appear in Proceedings of the IEEE. (In press)

E. Chung, E. Nurvitadhi, J. Hoe, K. Mai, B. Falsafi, “Accelerating Architectural-Level Full-System Multi-Processor Simulations Using FPGAs,” To appear in ACM/SIGDA International Symposium on Field-Programmable Gate Arrays, February 2008.

J. Kim, N. Hardavellas, K. Mai, B. Falsafi, J. Hoe, "Multi-bit Error Tolerant Caches Using Two-Dimensional Error Coding," ACM/IEEE International Symposium on Microarchitecture, Dec. 2007.

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Ken mai

Ken Maiken Mai is an Assistant Professor in Electrical and Computer Engineering.

His research interests are with process technologies scaling into the nanometer regime, the underlying implementation technology increasingly affects architecture and circuit design. We must adapt and reinvent current designs to circumvent technology constraints (e.g. interconnect delay, device leakage, soft-errors, device mismatch) and to target emerging applications (e.g. sensor networks, computational biology). The key near-term challenge is to build computer systems that can efficiently achieve high-performance, yet remain economically feasible, general-purpose, and easy to program. In the long-term, with CMOS scaling approaching fundamental limits, the challenge will be to build efficient, high-performance, reliable computation systems from technology building blocks that may be radically different from those we use today.

His primary research interest is the circuit design of efficient, high-performance digital blocks (i.e. memories and functional units) in future generation technologies. Further,his interests lie in building tools to export VLSI-level design information and constraints to architectural-level design.

Education

PhD, 2005. Electrical Engineering, Stanford University
MS, 1997. Electrical Engineering, Stanford University
BS, 1993. Electrical Engineering, Stanford University